The present disclosure relates to time-to-digital converters which digitize analog temporal information.
Advances in digital phase-locked loop circuits have in recent years lead to an extensive development of time-to-digital converters. A typical time-to-digital converter includes a ring oscillator and a latch circuit. A preceding input signal is allowed to propagate in a ring oscillator, and each phase signal in the ring oscillator is latched using a following input signal, and the latched phase state is output as a digital value corresponding to a time interval between edges of the input signals.
When a time-to-digital converter is applied to a time interval analyzer etc., the time-to-digital converter is required to be able to measure a longer time difference. If the period of the ring oscillator is extended in order to meet the requirement, the circuit scale significantly increases. Therefore, a counter which counts the number of cycles of the output signal of the ring oscillator may be added to the time-to-digital converter to extend the measurement range without an increase in circuit scale or a reduction in detection accuracy (see, for example, Japanese Unexamined Patent Publication No. H03-220814).
There is also a demand for a time-to-digital converter having an improved resolution of digital conversion in addition to the extended measurement range. In the above conventional technique, while the measurement range can be extended without an increase in circuit scale, the resolution is no higher than the inverter delay of the ring oscillator, i.e., is not sufficient. Therefore, there is a need for a time-to-digital converter which simultaneously has a wide measurement range and a high resolution.